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rt9204/a preliminary 1 ds9204/a-08 march 2007www.richtek.com features l operate from 5v l 0.8v internal reference l voltage mode pwm control l fast transient response l fixed 600khz oscillator frequency l full 0 to 100% duty cycle l internal soft start l internal pwm loop compensation l rohs compliant and 100% lead (pb)-free pin configurations applications l motherboard power regulation for computers l subsystems power supplies l cable modems, set top box, and dsl modems l dsp and core communications processor supplies l memory power supplies l personal computer peripherals l industrial power supplies l 5v-input dc-dc regulators l low voltage distributed power supplies dual regulators - standard buck pwm dc-dc and linear controller ordering information general description the rt9204/a is a dual power controllers designed for high performance graphics cards and computer applications. the ic integrates a standard buck controller, a linear regulator driver and protection functions into a small 8-pin package. the rt9204/a uses an internal compensated voltage mode pwm control for simple application design. an internal 0.8v reference allows the output voltage to be precisely regulated to low voltage requirement. a fixed 600khz oscillator reduce the component size for saving board area. the rt9204/a protects the converter and regulator by monitoring the output under voltage. (top view) sop-8 gnd vcc drv fbl fb sd boot ugate 2 3 4 5 6 7 8 note : richtek pb-free and green products are : } rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. } suitable for use in snpb or pb-free soldering processes. } 100%matte tin (sn) plating. rt9204/a package type s : sop-8 operating temperature range p : pb free with commercial standard g : green (halogen free with commer- cial standard) uvp : hiccup mode uvp : latch mode
rt9204/a preliminary 2 ds9204/a-08 march 2007 www.richtek.com typical application circuit vcc drv ugate boot gnd sd rt9204/a 5 8 7 6 1 3 fb r4 100 + c6 220uf v out2 1.6v 1uf 3.3v q1 2sd1802 c3 0.1uf bat54a r3 250 r2 120 c7 10nf fbl r5 100 + l1 5uh c4 1000uf 2.5v v out1 mu c2 1uf + c1 470uf r1 10 5v c5 v aux 4 2 d1 ss34 vcc drv ugate boot gnd sd rt9204/a 5 8 7 6 1 3 fb r4 100 + c6 220uf v out2 1.6v 3.3v q1 2sd5706 r3 250 r2 120 c7 10nf fbl r5 100 + l1 5uh c4 1000uf 2.5v v out1 mu c2 1uf + c1 470uf r6 10 12v v aux 4 2 d1 ss34 suggest use transistor c7 1uf r1 5v c5 1uf 5v 0 figure1. rt9204/a powered from 5v only figure2. rt9204/a powered from 12v
rt9204/a preliminary 3 ds9204/a-08 march 2007www.richtek.com function block diagram gnd vcc rt9203/a boot c vcc 1uf c boot 0.1uf + c out 1000uf l 5uh mu d g s diode + c in1 1uf c in2 470uf gnd return layout placement layout notes 1. put c 1 & c 2 to be near the mu drain and ml source nodes. 2. put rt9204/a to be near the c out 3. put c boot as close as to boot pin 4. put c vcc as close as to vcc pin 0.8 reference power on reset soft start + - ovp + - uvp 1v + - 35db 0.8v 0.5v error amplifier + - pwm 600khz oscillator control logic 6.0v regulation gnd fb vcc boot ugate + - uvp + - + + ss ldo drv fbl
rt9204/a preliminary 4 ds9204/a-08 march 2007 www.richtek.com functional pin description gnd (pin 1) signal and power ground for the ic. all voltage levels are measured with respect to this pin. vcc (pin 2) this is the main bias supply for the rt9204/a. this pin also provides the gate bias charge for the lower mosfets gate. the voltage at this pin monitored for power-on reset (por) purpose. this pin is also the internal 6.0v regulator output powered from boot pin when boot pin is directly powered from atx 12v. drv (pin 3) this pin is linear regulator output driver. connect to external bypass npn transistor base or nmosfet gate terminal. fbl (pin 4) this pin is connected to the linear regulator output divider. this pin also connects to internal linear regulator error amplifier inverting input and protection monitor. fb (pin 5) this pin is connected to the pwm converter's output divider. this pin also connects to internal pwm error amplifier inverting input and protection monitor. sd (pin 6) active low design with a 40 m a pull low current source. pull this pin to vcc to shutdown both pwm and linear regulator. boot (pin 7) this pin provides ground referenced bias voltage to the upper mosfet driver. a bootstrap circuit is used to create a voltage suitable to drive a logic-level n-channel mosfet when operating at a single 5v power supply. this pin also could be powered from atx 12v, in this situation, an internal 6.0v regulator will supply to vcc pin for internal voltage bias. ugate (pin 8) connect ugate pin to the pwm converter's upper mosfet gate. this pin provides the gate drive for the upper mosfet.
rt9204/a preliminary 5 ds9204/a-08 march 2007www.richtek.com absolute maximum ratings l supply voltage vcc------------------------------------------------------------------------------------------------7v l boot & ugate to gnd-------------------------------------------------------------------------------------------15v l input, output or i/o voltage---------------------------------------------------------------------------------------gnd-0.3v to 7v l power dissipation, p d @ t a = 25 c sop-8------------------------------------------------------------------------------------------------------------------0.625w l package thermal resistance sop-8, q ja ------------------------------------------------------------------------------------------------------------------------------------------------------- 160 c/w l ambient temperature range--------------------------------------------------------------------------------------0 c to +70 c l junction temperature range-------------------------------------------------------------------------------------- - 40 c to +125 c l storage temperature range--------------------------------------------------------------------------------------- - 65 c to +150 c l lead temperature (soldering, 10 sec.)--------------------------------------------------------------------------260 c caution: stresses beyond the ratings specified in absolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. electrical characteristics (v cc = 5v, t a = 25 c, unless otherwise specified.) parameter symbol test conditions min typ max units vcc supply current nominal supply current i cc ugate, lgate open -- 3 -- ma vcc regulated voltage v cc vboot=12v -- 6 -- v power-on reset rising vcc threshold 3.75 4.1 4.35 v vcc threshold hysteresi s -- 0.5 -- v reference reference voltage both fb & fbl 0.784 0.8 0.816 v oscillator free running frequency 550 600 650 k hz ramp amplitude d v osc -- 1.75 -- v p-p pwm error amplifier dc gain -- 35 -- db pwm controller gate driver upper drive source r ugate v boot = 12v; v boot - v ugate = 1v -- 7 -- w upper drive sink r ugate v ugate = 1v -- 5 -- w linear regulator drv driver source v drv = 2v 100 -- -- ma to be continued
rt9204/a preliminary 6 ds9204/a-08 march 2007 www.richtek.com parameter symbol test conditions min typ max units protection fb over - voltage trip fb rising -- 1 -- v fb & fbl under - voltage trip fb & fbl falling -- 0.5 -- v soft - start interval -- 1 -- m s sd pin threshold v cc = 5v -- 1.5 -- v sd pin sink current v cc = 5v -- 40 -- m a
rt9204/a preliminary 7 ds9204/a-08 march 2007www.richtek.com typical operating characteristics load transient time (5us/div) v cc = 5v v out = 2.2v c out = 3000uf v out ugate power on time (1ms/div) v cc = 5v v out = 2.2v v cc v out1 v out2 short hiccup time (2ms/div) v cc = 5v v out = 2.2v v out ugate rt9204a load transient time (5us/div) v cc = 5v v out = 2.2v c out = 3000uf v out ugate power off time (50ms/div) v cc = 5v v cc v out1 v out2 short hiccup (latch mode) time (5ms/div) v cc = 5v v out = 2.2v v out ugate rt9204
rt9204/a preliminary 8 ds9204/a-08 march 2007 www.richtek.com reference vs. temperature 0.796 0.797 0.798 0.799 0.800 0.801 0.802 0.803 -50050100150 temperature r e f e r e n c e ( v ) ( c) oscillator frequency vs. temperature 270 275 280 285 290 295 300 305 310 315 -50050100150 temperature f r e q u e n c y ( k h z ) a ( c) por (rising/falling) vs. temperature 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 -50050100150 temperature p o r ( v ) rising falling ( c)
rt9204/a preliminary 9 ds9204/a-08 march 2007www.richtek.com application information the rt9204/a operates at either single 5v power supply with a bootstrap ugate driver or 5v/12v dual-power supply form the atx smps. the dual- power supply is recommended for high current application, the rt9204/a can deliver higher gate driving current while operating with atx smps based on dual-power supply. the bootstrap operation in a single power supply system, the ugate driver of rt9204/a is powered by an external bootstrap circuit, as the figure 3. the boot capacitor, c boot , generates a floating reference at the phase node. typically a 0.1 m f c boot is enough for most of mosfets used with the rt9204/a. the voltage drop between boot and phase node is refreshed to a voltage of vcc - diode drop (v d ) while the low side mosfet turning on. figure 3. single 5v power supply operation dual power operation the rt9204/a was designed to regulate a 6.0v at vcc pin automatically when boot pin is powered by 12v. in a system with atx 5v/12v power supply, the rt9204 is ideal for higher current application due to the higher gate driving capability, v ugate = 7v. a rc (10 w /1 m f) filter is also recommended at boot pin to prevent the ringing induced from fast power on, as shown in figure 4. figure 4. dual power supply operation power on reset the power-on reset (por) monitors the supply voltage (normal +5v) at the vcc pin and the input voltage at the ocset pin. the vcc por level is 4.1v with 0.5v hysteresis and the normal level at ocset pin is 1.5v (see over-current protection). the por function initiates soft-start operation after all supply voltages exceed their por thresholds. soft start a built-in soft-start is used to prevent surge current from power supply input during power on. the soft-start voltage is controlled by an internal digital counter. it clamps the ramping of reference voltage at the input of error amplifier and the pulse-width of the output driver slowly. the typical soft-start duration is 2ms. under voltage and over voltage protection the voltage at fb pin is monitored and protected against oc (over current), uv (under voltage), and ov (over voltage). the uv threshold is 0.5v and ov-threshold is 1.0v. both uv/ov detection have 30 m s triggered delay. when oc or uv trigged, a hiccup re-start sequence will be initialized, as shown in figure 5. for rt9204, only 3 times of trigger are allowed to latch off. but for rt9204a, uvp will be kept hiccup mode. hiccup is disabled during soft-start interval. + 5v phase ugate boot r1 vcc c2 1uf rt9204/a 0.1uf d1 + 5v ugate boot r c2 1uf rt9204/a 1uf 6.0v regulation 10 c 12v vcc
rt9204/a preliminary 10 ds9204/a-08 march 2007 www.richtek.com inductor selection the rt9204/a was designed for v in = 5v, step-down application mainly. figure 6 shows the typical topology and waveforms of step-down converter. the ripple current of inductor can be calculated as follows: because operation frequency is fixed at 600khz, the v out ripple is esr is cout capacitor equivalent series resistor table 1 shows the ripple voltage of v out : vin = 5v *refer to sanyo low esr series (ce, dx, px......) the suggested l and c are as follows: 2 m h with 3 1500 m f c out 5 m h with 3 1000 m f c out figure 5 shutdown pulling high the sd pin by a small single transistor can shutdown the rt9204/a pwm controller as shown in typical application circuit. normally sd pin can be floating because an internal 40 m a current source will pull low the sd shutdown pin voltage. v out 3.3v 2.5v 1.5v inductor 2 m h 5 m h 2 m h 5 m h 2 m h 5 m h 1000 m f (esr = 53m w ) 100mv 40mv 110mv 44mv 93mv 37mv 1500 m f (esr = 33m w ) 62mv 25mv 68mv 28mv 58mv 23mv 3000 m f (esr = 21m w ) 40mv 16mv 43mv 18mv 37mv 15mv 0v 2v 4v i n t e r n a l s s f b o r f b l v o l t a g e t0t1t2 t3 time count = 1 count = 2 count = 3 overload applied figure 6 i d i d i q i q uq ui l i l i l = i o v l v i - v o - v o t s t on t off table 1 v i v o r c d l q c.c.m. out rippleon (5v-v) il=t l out on v t=3.33 5v out rippleripple v = il esr
rt9204/a preliminary 11 ds9204/a-08 march 2007www.richtek.com input / output capacitor high frequency/long life decoupling capacitors should be placed as close to the power pins of the load as physically possible. be careful not to add inductance to the pcb trace, as it could eliminate the performance from utilizing these low inductance components. consult with the manufacturer of the load on specific decoupling requirements. the output capacitors are necessary for filtering output and stabilizing the close loop (see the pwm loop stability). for powering advanced, high-speed processors, it is required to meet with the requirement of fast load transient, high frequency capacitors with low esr/esl capacitors are recommended. another concern is high esr induced ripple may trigger uv or ov protections. linear regulator driver the linear regulator of rt9204/a was designed to drive bipolar npn or mosfet pass transistor. for mosfet pass transistor, normally drv need to provide minimum v out2 +vt+gate-drive voltage to keep v out2 as setting voltage. when driving mosfet operating at 5v power supply system, the gate-drive will be limited at 5v. in this situation shown in figure 5, low vt threshold mosfet (vt = 1v) and vout2 setting below 2.5v were suggested. in v boot = 12v operation condition as figure 8, vcc is regulated as higher to 6v providing more gate-drive for pass mosfet transistor, v out2 can be set as 3.3v. figure 7 figure 8 pwm loop stability the rt9204/a is a voltage mode buck controller designed for 5v step-down applications. the gain of error amplifier is fixed at 35db for simplified design. the output amplitude of ramp oscillator is 1.6v, the loop gain and loop pole/zero are calculated as follows: the rt9204/a bode plot as shown figure 9. is stable in most of application conditions. figure 9 boot vcc drv fbl rt9204/a vcc = 5v r4 r3 + r4<1k v out2 < 2.5v boot vcc drv fbl rt9204/a 6v r4 r3 + r4<1k v boot = 12v v out2 < 3.3v loop gain 40 30 20 10 1m 10k 1k 100 100k v out = 3.3v c out = 1500uf(33m w ) l = 2uh v out = 1.5v v out = 2.5v v out = 3.3v p o = 2.9khz z o = 3.2khz p p a out o a o 50.8 dc loop gain g = 35 db 1.6v 1 lc filter pole p = 2lc error amp pole p =300khz 1 esr zero z = 2esrc
rt9204/a preliminary 12 ds9204/a-08 march 2007 www.richtek.com reference voltage because rt9204/a use a low 35db gain error amplifier, shown in figure 10. the voltage regulation is dependent on v in & v out setting. the fb reference voltage of 0.8v were trimmed at v in = 5v & v out = 2.5v condition. in a fixed v in = 5v application, the fb reference voltage vs. v out voltage can be calculated as figure 11. figure 11 figure 10 feedback divider the reference of rt9204/a is 0.8v. both the pwm and ldo output voltages can be set using a resistor based divider as shown in figure 12. put the r1&r2 and r3&r4 as close as possible to fb pin and r2&r4 should be less than 1 k w to avoid noise coupling. the c1 capacitor is a speed-up capacitor for reducing output ripple to meet with the requirement of fast transient load. typically a 1nf ~ 0.1 m f is enough for c1. figure 12 pwm layout considerations mosfets switch very fast and efficiently. the speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. the voltage spikes can degrade efficiency and radiate noise, that results in ocer-voltage stress on devices. careful component placement layout and printed circuit design can minimize the voltage spikes induced in the converter. consider, as an example, the turn-off transition of the upper mosfet prior to turn-off, the upper mosfet was carrying the full load current. during turn-off, current stops flowing in the upper mosfet and is picked up by the low side mosfet or schottky diode. any inductance in the switched current path generates a large voltage spike during the switching interval. careful component selections, layout of the critical components, and use shorter and wider pcb traces help in minimizing the magnitude of voltage spikes. there are two sets of critical components in a dc-dc converter using the rt9204/a. the switching power components are most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. the critical small signal components are those connected to sensitive nodes or those supplying critical bypass current. + - ea + - pwm i 3 56k i 2 1k + - fb rep 0.8v ramp 1.75v f b ( v ) v out (v) 4 3.5 3 11.522.5 0.82 0.78 0.80 0.81 0.79 0.54.5 vin = 5v v in + r1 c1 fb rt9204/a v out1 l r2 <1k c out v out2 = 0.8v (1+ ) r4 r3 fbl drv r3 r4 r4<1k + v out2 v out1 = 0.8v (1+ ) r2 r1
rt9204/a preliminary 13 ds9204/a-08 march 2007www.richtek.com the power components and the pwm controller should be placed firstly. place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. place the output inductor and output capacitors between the mosfets and the load. also locate the pwm controller near by mosfets. a multi-layer printed circuit board is recommended. figure 13. shows the connections of the critical components in the converter. note that the capacitors cin and cout each of them represents numerous physical capacitors. use a dedicated grounding plane and use vias to ground all critical components to this layer. apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. the power plane should support the input power and output power nodes. use copper filled polygons on the top and bottom circuit layers for the phase node, but it is not necessary to oversize this particular island. since the phase node is subjected to very high dv/dt voltages, the stray capacitance formed between these island and the surrounding circuitry will tend to couple switching noise. use the remaining printed circuit layers for small signal routing. the pcb traces between the pwm controller and the gate of mosfet and also the traces connecting source of mosfets should be sized to carry 2a peak currents. figure 13 + + load + vcc gnd rt9204/a fb ugate il iq1 v out q1 iq2 5v gnd
rt9204/a preliminary 14 ds9204/a-08 march 2007 www.richtek.com richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 8f, no. 137, lane 235, paochiao road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)89191466 fax: (8862)89191465 email: marketing@richtek.com outline dimension a b j f h m c d i 8-lead sop plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 3.988 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.508 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.050 0.254 0.002 0.010 j 5.791 6.200 0.228 0.244 m 0.400 1.270 0.016 0.050

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